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Posted: Wednesday, November 8, 2017 2:24 AM

Principal Engineers at Intel are active technical leaders inside and outside the company. Activities include participation in major industry and academic conferences, voting membership in international standards committees, generation of patents and technical papers. Note This job code can only be assigned if an employee has participated in an official Technical Leadership Program TLp nomination process for his/her business group. An employee's manager must confirm participation in TLp nomination process prior to job code assignment.


This senior full-time position is responsible for strategizing and leading development of the simulator infrastructure used to define next-generation Intel CPUs for 2020 and beyond. Simulator infrastructure includes functional simulation, power/performance modeling, and integration with other tool chains such as RTL environment, virtual platforms, and validation tool chains. Candidates must have strong grounding in CPU architecture comprehensive experience developing the tools, flows, and methods to support CPU architecture definition and product delivery and the project management capability to organize and direct diverse resources across multiple teams to deliver. Responsibilities include, but are not limited to, the following: * Defining forward-looking strategy for simulation infrastructure to support accurate, performant, and comprehensive CPU power/performance estimation.* Software project management of multiple components of the simulation infrastructure tool chain, partnering with teams inside and outside of the project to deliver the above.* Management of a small number of senior individual contributors providing direct development support for the current CPU projects. QualificationsCandidates must possess the Minimum qualifications listed below to be considered for this position. The Preferred qualifications listed below are considered plus factors for identifying top candidates. Minimum Requirements: * Technical degree in Computer Science, Computer Engineering, or Electrical Engineering* 20+ years of relevant work experience covering the following areas: 1. Computer architecture tools, flows, and methods. 2. RTL and/or validation Test Environment development. 3. Software project management with emphasis on cross-team execution.* Track record of leadership success in delivering or supporting the delivery of high-complexity semiconductor products to the market e.g. CPUs, GPUs, chipsets, NICs, etc.* 5+ years of experience managing high-function software developers.Preferred Requirements:* RTL/design/validation experience on high-volume semiconductor products.* Research publications, patent filings, or other evidence of personal technical innovation in computer architecture. * Knowledge of Intel Architecture ISA.

Inside this Business Group

The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.

Other Locations

Oregon, Hillsboro;

Posting Statement. Intel prohibits discrimination based on race, color, religion, gender, national origin, age, disability, veteran status, marital status, pregnancy, gender expression or identity, sexual orientation or any other legally protected status.

Position of Trust. This role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Talent Consultant.

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• Location: Phoenix

• Post ID: 63442532 phoenix is an interactive computer service that enables access by multiple users and should not be treated as the publisher or speaker of any information provided by another information content provider. © 2017